Since the MIPS R4000 has a fixed 32-bit instruction size, it cannot have a generalized “load 32-bit immediate constant” instruction. (There would be no room in the instruction for the opcode!) <\/p>\n
If you look at the integer calculations available, you see that there are some ways of generating constants in a single instruction. <\/p>\n
Constants in the range Constants in the range If we had a But alas that instruction doesn't exist. <\/p>\n To build 32-bit values that cannot be created with these one-instruction tricks, you can use the It loads the 16-bit immediate value into the upper 16 bits of the destination register and zeroes out the bottom 16 bits. You can then follow this up with an There is a data dependency here, and you might expect a pipeline bubble because the Since the constant is loaded up 16 bits at a time, when a module needs to be relocated, moving it by a multiple of 64KB<\/a> permits the fixup to be applied only to the There are a few pseudo-instructions provided by the assembler for loading 32-bit constants. <\/p>\n The The Next time, we'll look at aligned memory access. <\/p>\n","protected":false},"excerpt":{"rendered":" Load them up, a half at a time.<\/p>\n","protected":false},"author":1069,"featured_media":111744,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[1],"tags":[25],"class_list":["post-98445","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-oldnewthing","tag-code"],"acf":[],"blog_post_summary":" Load them up, a half at a time.<\/p>\n","_links":{"self":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/98445","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/users\/1069"}],"replies":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/comments?post=98445"}],"version-history":[{"count":0,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/98445\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media\/111744"}],"wp:attachment":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media?parent=98445"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/categories?post=98445"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/tags?post=98445"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}0x00000000<\/code> to 0x0000FFFF<\/code> can be generated in one instruction by using ORI<\/code>, which treats its 16-bit immediate as an unsigned value. <\/p>\n\n ORI rd, zero, imm16\n<\/pre>\n
0xFFFF8000<\/code> to 0xFFFFFFFF<\/code> can be generated with the ADDIU<\/cODE> instruction, which treats its 16-bit immediate as a signed value.<\/p>\n\n ADDIU rd, zero, imm16\n<\/pre>\n
NORI<\/code> instruction, then we could have used it to generate constants in the range 0xFFFF0000<\/code> to 0xFFFFFFFF<\/code>:<\/p>\n\n NORI rd, zero, imm16\n<\/pre>\n
LUI<\/code> instruction, which means \"load upper immediate\". <\/p>\n\n LUI rd, imm16 ; rd = imm16 << 16\n<\/pre>\n
ORI<\/code> to finish the job: <\/p>\n\n LUI rd, XXXX ; rd = XXXX0000\n ORI rd, rd, YYYY ; rd = XXXXYYYY\n<\/pre>\n
ORI<\/code> depends on the result of the previous instruction, which won't be available until the write-back stage four cycles later. However, the processor supports integer arithmetic forwarding<\/a>: The result of an arithmetic operation produced in the execute stage can be fed directly to the execute stage of the next instruction, thereby avoiding a stall. <\/p>\nXXXX<\/code> part, leaving the YYYY<\/code> part alone. (Previous discussion<\/a>.) This is a very useful property, because in practice, these two instructions may not be adjacent to each other. The compiler might choose to interleave other calculations to avoid the data dependency stall. <\/p>\n\n LI rd, imm32 ; rd = imm32 (by whatever means)\n LA rd, global_variable ; rd = address_of global_variable\n<\/pre>\n
LI<\/code> pseudo-instruction loads a 32-bit immediate into rd<\/var> using a single-instruction trick if available; otherwise, it uses the two-instruction sequence. <\/p>\nLA<\/code> pseudo-instruction does the same thing, but the 32-bit value comes from the address of a global variable and is consequently subject to a relocation fixup. <\/p>\n