\nThere are a few ways to load constants into SSE registers.\n<\/p>\n
movd<\/code>.<\/p>\n- Insert selected bits from general purpose registers via\n
pinsr[b|w|d|q]<\/code>.<\/p>\n- Try to calculate them in clever ways.\n<\/ul>\n
\nLoading constants from memory incurs memory access penalties.\nLoading or inserting them from general purpose registers incurs\ncross-domain penalties.\nSo let’s see what we can do with clever calculations.\n<\/p>\n
\nThe most obvious clever calculations are the ones for setting\na register to all zeroes or all ones.\n<\/p>\n
\n pxor xmm0, xmm0 ; set all bits to zero\n pcmpeqd xmm0, xmm0 ; set all bits to one\n<\/pre>\n\nThese two idioms are special-cased in the processor and execute\nfaster than normal pxor and pcmpeqd instructions\nbecause the results are not dependent on the previous value\nin xmm0<\/code>.\n<\/p>\n\nThere’s not much more you can do to construct other\nvalues from zero,\nbut a register with all bits set does create additional\nopportunities.\n<\/p>\n
If you need a value loaded into all lanes whose bit pattern\nis either a bunch of 0’s followed by a bunch of 1’s,\nor a bunch of 1’s followed by a bunch of 0’s,\nthen you can shift in zeroes.\nFor example, assuming you’ve set all bits in xmm0<\/code> to 1,\nhere’s how you can load some other constants:\n<\/p>\n\n pcmpeqd xmm0, xmm0 ; set all bits to one\n-then-\n pslld xmm0, 30 ; all 32-bit lanes contain 0xC0000000\n-or-\n psrld xmm0, 29 ; all 32-bit lanes contain 0x00000007\n-or-\n psrld xmm0, 31 ; all 32-bit lanes contain 0x00000001\n<\/pre>\n\nIntel suggests loading 1 into all lanes with the sequence\n<\/p>\n
\n pxor xmm0, xmm0 ; xmm0 = { 0, 0, 0, 0 }\n pcmpeqd xmm1, xmm1 ; xmm1 = { -1, -1, -1, -1 }\n psubd xmm0, xmm1 ; xmm0 = { 1, 1, 1, 1 }\n<\/pre>\n\nbut that not only takes more instructions but also consumes two registers,\nand registers are at a premium since there are only eight of them.\nThe only thing I can think of is that psubd<\/code> might be faster\nthan psrld<\/code>.\n<\/p>\n\nIn general, to load 2ⁿ−1<\/code>\ninto all lanes, you do<\/p>\n\n pcmpeqd xmm0, xmm0 ; set all bits to one\n-then-\n psrlw xmm0, 16-n ; clear top 16-n bits of all 16-bit lanes\n-or-\n psrld xmm0, 32-n ; clear top 32-n bits of all 32-bit lanes\n-or-\n psrlq xmm0, 64-n ; clear top 64-n bits of all 64-bit lanes\n<\/pre>\n\nConversely, if you want to load\n~(2ⁿ−1) = -2ⁿ<\/code> into all lanes,\nyou shift the other way.\n<\/p>\n\n pcmpeqd xmm0, xmm0 ; set all bits to one\n-then-\n psllw xmm0, n ; clear bottom n bits of all 16-bit lanes = 2¹⁶ - 2ⁿ\n-or-\n pslld xmm0, n ; clear bottom n bits of all 32-bit lanes = 2³² - 2ⁿ\n-or-\n psllq xmm0, n ; clear bottom n bits of all 64-bit lanes = 2⁶⁴ - 2ⁿ\n<\/pre>\n\nAnd if the value you want has all its set bits in the middle,\nyou can combine two shifts (and stick something in between the two\nshifts to ameliorate the stall):\n<\/p>\n
\n pcmpeqd xmm0, xmm0 ; set all bits to one\n-then-\n psrlw xmm0, 13 ; all lanes = 0x0007\n psllw xmm0, 4 ; all lanes = 0x0070\n-or-\n psrld xmm0, 31 ; all lanes = 0x00000001\n pslld xmm0, 3 ; all lanes = 0x00000008\n<\/pre>\n\nIf you want to set high or low lanes to zero,\nyou can use pslldq<\/code> and\npsrldq<\/code>.\n<\/p>\n\n pcmpeqd xmm0, xmm0 ; set all bits to one\n-then-\n pslldq xmm0, 2 ; clear bottom word, xmm0 = { -1, -1, -1, -1, -1, -1, -1, 0 }\n-or-\n pslldq xmm0, 4 ; clear bottom dword, xmm0 = { -1, -1, -1, 0 }\n-or-\n pslldq xmm0, 8 ; clear bottom qword, xmm0 = { -1, 0 }\n-or-\n psrldq xmm0, 2 ; clear top word, xmm0 = { 0, -1, -1, -1, -1, -1, -1, -1 }\n-or-\n psrldq xmm0, 4 ; clear top dword, xmm0 = { 0, -1, -1, -1 }\n-or-\n psrldq xmm0, 8 ; clear top qword, xmm0 = { 0, -1 }\n<\/pre>\n\nNo actual program today.\nJust some notes from my days writing SSE assembly language.\n<\/p>\n