{"id":108657,"date":"2023-08-28T07:00:00","date_gmt":"2023-08-28T14:00:00","guid":{"rendered":"https:\/\/devblogs.microsoft.com\/oldnewthing\/?p=108657"},"modified":"2023-08-27T08:07:22","modified_gmt":"2023-08-27T15:07:22","slug":"20230828-00","status":"publish","type":"post","link":"https:\/\/devblogs.microsoft.com\/oldnewthing\/20230828-00\/?p=108657","title":{"rendered":"Just for fun: Which processors prefer sign-extended loads, and which prefer zero-extended loads?"},"content":{"rendered":"<p>Just for fun, let&#8217;s compare what happens on different processor architectures when you load a value from memory into a larger register. Possible responses are<\/p>\n<ul>\n<li>Unable: The processor does not support loading data into a larger register.<\/li>\n<li>Zero-extend: The processor zero-extends the small value to the large value.<\/li>\n<li>Sign-extend: The processor sign-extends the small value to the large value.<\/li>\n<li>Either: The processor has separate instructions for sign and zero extension.<\/li>\n<li>(blank): Does not apply because the processor doesn&#8217;t have registers larger than this.<\/li>\n<\/ul>\n<table class=\"cp3\" style=\"border-collapse: collapse;\" border=\"1\" cellspacing=\"0\" cellpadding=\"3\">\n<tbody>\n<tr>\n<th>Processor<\/th>\n<th>From byte<\/th>\n<th>From 16-bit<\/th>\n<th>From 32-bit<\/th>\n<\/tr>\n<tr>\n<td>8086<\/td>\n<td>Unable<\/td>\n<td>&nbsp;<\/td>\n<td>&nbsp;<\/td>\n<\/tr>\n<tr>\n<td>Alpha AXP<\/td>\n<td>Unable<\/td>\n<td>Unable<\/td>\n<td>Sign-extend<\/td>\n<\/tr>\n<tr>\n<td>Alpha AXP with BWX<\/td>\n<td>Zero-extend<\/td>\n<td>Zero-extend<\/td>\n<td>Sign-extend<\/td>\n<\/tr>\n<tr>\n<td>80386<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>&nbsp;<\/td>\n<\/tr>\n<tr>\n<td>x86-64<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<tr>\n<td>Intel ia64<\/td>\n<td>Zero-extend<\/td>\n<td>Zero-extend<\/td>\n<td>Zero-extend<\/td>\n<\/tr>\n<tr>\n<td>MIPS<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<tr>\n<td>PowerPC<\/td>\n<td>Zero-extend<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<tr>\n<td>SH-4<\/td>\n<td>Sign-extend<\/td>\n<td>Sign-extend<\/td>\n<td>&nbsp;<\/td>\n<\/tr>\n<tr>\n<td>ARM<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<tr>\n<td>68000<\/td>\n<td>Unable<\/td>\n<td>Unable<\/td>\n<td>&nbsp;<\/td>\n<\/tr>\n<tr>\n<td>SPARC<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<tr>\n<td>RISC-V<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<td>Either<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>Notes:<\/p>\n<ul>\n<li>The Alpha AXP with BWX is the only processor on the list where the extension mode changes between zero and sign, depending on size. This is a historical artifact: It inherited the &#8220;sign-extend&#8221; entry from the &#8220;Alpha AXP&#8221; row above it, but it turns out that bytes are usually zero-extended, so the BWX extension chose zero-extension for bytes. Words went along with bytes to minimize the weirdness.<\/li>\n<li>The x86-64 supports both zero-extended 32-to-64 loads and sign-extended 32-to-64 loads, but the zero-extended load offers a more compact encoding.<\/li>\n<\/ul>\n<p>We can organize the processors by how they choose to extend small values to larger values:<\/p>\n<table class=\"cp3\" style=\"border-collapse: collapse;\" border=\"1\" cellspacing=\"0\" cellpadding=\"3\">\n<tbody>\n<tr>\n<th>Unable<\/th>\n<td>8086, 68000, Alpha AXP (bytes and words)<\/td>\n<\/tr>\n<tr>\n<th>Zero-extend<\/th>\n<td>ia64, PowerPC (bytes)<\/td>\n<\/tr>\n<tr>\n<th>Sign-extend<\/th>\n<td>Alpha AXP, SH-4<\/td>\n<\/tr>\n<tr>\n<th>Either<\/th>\n<td>80386, x86-64, MIPS, ARM, SPARC, RISC-V<\/td>\n<\/tr>\n<tr>\n<th>Mixed<\/th>\n<td>Alpha AXP with BWX, PowerPC<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"excerpt":{"rendered":"<p>Another pointless chart.<\/p>\n","protected":false},"author":1069,"featured_media":111744,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[1],"tags":[2],"class_list":["post-108657","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-oldnewthing","tag-history"],"acf":[],"blog_post_summary":"<p>Another pointless chart.<\/p>\n","_links":{"self":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/108657","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/users\/1069"}],"replies":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/comments?post=108657"}],"version-history":[{"count":0,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/108657\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media\/111744"}],"wp:attachment":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media?parent=108657"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/categories?post=108657"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/tags?post=108657"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}