There are far more instructions than I’m going to cover here in this series. I’ve skipped over the floating point instructions, the SIMD instructions, and specialty instructions that I haven’t yet seen come out of the compiler. I’m also largely skipping over the instructions that are not part of the core instruction set but are available only in optional extensions.<\/p>\n
Here are a few that are still interesting, even if I haven’t seen the compiler generate them.<\/p>\n
; count leading zeroes (high order bits)\r\n clz Rd, Rm ; Rd = number of leading zeroes in Rm\r\n\r\n ; count leading sign bits (high order bits)\r\n cls Rd, Rm ; Rd = number of leading sign bits in Rm\r\n\r\n ; reverse bits in register\r\n rbit Rd, Rm ; Rd = Rm bitwise reversed\r\n\r\n ; reverse bytes in register\r\n rev Rd, Rm ; Rd = Rm bytewise reversed\r\n\r\n ; reverse bytes in each halfword\r\n rev16 Rd, Rm\r\n\r\n ; reverse bytes in each word\r\n rev32 Rd, Rm\r\n\r\n ; reverse bytes in doubleword\r\n ; (pseudo-instruction, equivalent to rev with 64-bit register)\r\n rev64 Rd, Rm\r\n<\/pre>\nA few miscellaneous bit-fiddling instructions. The reversal instructions are primarily for changing data endianness. AArch64 lost the
REVSH<\/code> instruction from AArch32.<\/p>\nThe next few instructions provide multiprocessing hints.<\/p>\n
; yield to other threads\r\n yield\r\n\r\n ; wait for interrupt (privileged instruction)\r\n wfi\r\n<\/pre>\nThe
YIELD<\/code> instruction is a hint to multi-threading processors that the current thread should be de-prioritized in favor of other threads. You typically see this instruction dropped into spin loops, via the intrinsic__yield()<\/code>.<\/p>\nThe
WFI<\/code> instruction instructs the processor to go into a low-power state until an interrupt occurs. There are other instructions related to “events” which I won’t bother going into.<\/p>\nThe next few instructions are for communicating with the operating system:<\/p>\n
hlt #imm16 ; halt\r\n svc #imm16 ; system call\r\n brk #imm16 ; software breakpoint\r\n udf #imm16 ; undefined opcode\r\n<\/pre>\nThe instructions carry a 16-bit immediate that the operating system can choose to use for whatever purpose it desires.<\/p>\n
The undefined opcode is a range of instructions from
0x00000000<\/code> through0x0000ffff<\/code> that are architecturally set aside as permanently undefined instructions.\u00b9<\/p>\nWindows uses
BRK<\/code> for special operations.<\/p>\nbrk #0xf000 ; breakpoint\r\n brk #0xf001 ; assertion failure\r\n brk #0xf002 ; debug service\r\n brk #0xf003 ; fastfail\r\n brk #0xf004 ; divide by zero\r\n<\/pre>\nThe divide-by-zero breakpoint is emitted by the compiler if it detects a zero denominator.<\/p>\n
cbnz w0, @F ; jump if denominator is nonzero\r\n brk #0xf004 ; oops: manually raise div0 exception\r\n@@: sdiv w0, w1, w2 ; signed divide\r\n<\/pre>\nAnd of course, we have this guy:<\/p>\n
nop\r\n<\/pre>\nThe
NOP<\/code> instruction does nothing but occupy space. Use it to pad code to meet alignment requirements, but do not use it for timing.<\/p>\nNow that we have the basic instruction set under our belt, we’ll look at the calling convention next time.<\/p>\n
\u00b9 This means that zero encodes
udf #0<\/code>, which will trap on an invalid instruction. This is different from classic ARM, where zero encodesandeq r0, r0, r0<\/code> which is functionally a nop, and Thumb-2, where zero is themovs r0, r0<\/code> instruction, which is a mostly-nop except that it sets flags. Personally, I’m a big fan of having zero encode an invalid instruction. It helps post-mortem debugging a lot.<\/p>\n","protected":false},"excerpt":{"rendered":"Sweeping up the crumbs.<\/p>\n","protected":false},"author":1069,"featured_media":111744,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[1],"tags":[2],"class_list":["post-107032","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-oldnewthing","tag-history"],"acf":[],"blog_post_summary":"
Sweeping up the crumbs.<\/p>\n","_links":{"self":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/107032","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/users\/1069"}],"replies":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/comments?post=107032"}],"version-history":[{"count":0,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/107032\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media\/111744"}],"wp:attachment":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media?parent=107032"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/categories?post=107032"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/tags?post=107032"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}