{"id":106907,"date":"2022-07-27T07:00:00","date_gmt":"2022-07-27T14:00:00","guid":{"rendered":"https:\/\/devblogs.microsoft.com\/oldnewthing\/?p=106907"},"modified":"2022-11-29T10:19:49","modified_gmt":"2022-11-29T18:19:49","slug":"20220727-00","status":"publish","type":"post","link":"https:\/\/devblogs.microsoft.com\/oldnewthing\/20220727-00\/?p=106907","title":{"rendered":"The AArch64 processor (aka arm64), part 2: Extended register operations"},"content":{"rendered":"

There are a number of places where the instruction set permits the value in a register to be transformed before it is used. The set of valid transforms vary from instruction to instruction, but they share a common syntax.<\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\u00a0<\/th>\nOperand<\/th>\nMeaning<\/th>\n<\/tr>\n
Shifted<\/span><\/td>\nRn\/zr, LSL #n<\/code><\/td>\nLogical shift left.<\/td>\n<\/tr>\n
Rn\/zr, LSR #n<\/code><\/td>\nLogical (unsigned) shift right.<\/td>\n<\/tr>\n
Rn\/zr, ASR #n<\/code><\/td>\nArithmetic (signed) shift right.<\/td>\n<\/tr>\n
Extended<\/span><\/td>\nWn\/sp, UXTB #n<\/code><\/td>\nUnsigned<\/td>\nextend low byte<\/td>\nshifted left.<\/td>\n<\/tr>\n
Wn\/sp, UXTH #n<\/code><\/td>\nUnsigned<\/td>\nextend low halfword<\/td>\nshifted left.<\/td>\n<\/tr>\n
Wn\/sp, UXTW #n<\/code><\/td>\nUnsigned<\/td>\nextend low word<\/td>\nshifted left.<\/td>\n<\/tr>\n
Xn\/sp, UXTX #n<\/code><\/td>\nUnsigned<\/td>\nextend low doubleword<\/td>\nshifted left.<\/td>\n<\/tr>\n
Wn\/sp, SXTB #n<\/code><\/td>\nSigned<\/td>\nextend low byte<\/td>\nshifted left.<\/td>\n<\/tr>\n
Wn\/sp, SXTH #n<\/code><\/td>\nSigned<\/td>\nextend low halfword<\/td>\nshifted left.<\/td>\n<\/tr>\n
Wn\/sp, SXTW #n<\/code><\/td>\nSigned<\/td>\nextend low word<\/td>\nshifted left.<\/td>\n<\/tr>\n
Xn\/sp, SXTX #n<\/code><\/td>\nSigned<\/td>\nextend low doubleword<\/td>\nshifted left.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

The LSL<\/code>, LSR<\/code>, and ASR<\/code> transformations are formally known as shifted registers<\/i>. They take a value in a register and shift it.<\/p>\n

The extend+shift transformations are formally known as extended registers<\/i>. They extract a subset of the source register, extend it either as a signed or unsigned value to the full operand size, and then shift the extended result.<\/p>\n

Shifting the zero register isn’t particular useful since you still get zero, but the instruction encoding lets you do it. Similarly, there is no practical difference between UXTX<\/code> and SXTX<\/code> (unsigned and signed extension of the low doubleword of a 64-bit register) since the low doubleword of a 64-bit register is the whole register<\/i>.<\/p>\n

For extended registers, the assembler lets you omit the shift amount, in which case it defaults to zero. The shift amount is not optional for the shifted registers.<\/p>\n

Before you get all excited about the possibilities, know that not all instructions support all of these transformations, and for the ones that they do, the shift amounts are limited. We’ll look at the restrictions as they arise. For now, I just wanted to introduce the concepts.<\/p>\n

As a convenience, if you are using an instruction that accepts only extended registers, but you want to use a LSL<\/code>, you can write LSL #n<\/code>, and the assembler will autoconvert it to UXTW #n<\/code> or UXTX #n<\/code>, depending on the operand size.<\/p>\n

Next time, we’ll start putting these transforms to use when we look at addressing modes.<\/p>\n","protected":false},"excerpt":{"rendered":"

The weird ways of transforming the value in a register.<\/p>\n","protected":false},"author":1069,"featured_media":111744,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[1],"tags":[2],"class_list":["post-106907","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-oldnewthing","tag-history"],"acf":[],"blog_post_summary":"

The weird ways of transforming the value in a register.<\/p>\n","_links":{"self":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/106907","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/users\/1069"}],"replies":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/comments?post=106907"}],"version-history":[{"count":0,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/posts\/106907\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media\/111744"}],"wp:attachment":[{"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/media?parent=106907"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/categories?post=106907"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/devblogs.microsoft.com\/oldnewthing\/wp-json\/wp\/v2\/tags?post=106907"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}