There are two instructions for accessing the flags register directly.<\/p>\n
; move register from special register\r\n mrs Rd, apsr ; Rd = APSR\r\n\r\n ; move special register from register\r\n msr apsr, Rd ; APSR = Rd\r\n<\/pre>\nThese instructions are for accessing special registers, but the only special register available to user mode is
APSR<\/code>, so that’s all you’re going to see, if you even see this at all.<\/p>\nThe format of the Application Program Status Register (APSR) is as follows:<\/p>\n
\n\n
\n 3
\n1<\/td>\n3
\n0<\/td>\n2
\n9<\/td>\n2
\n8<\/td>\n2
\n7<\/td>\n2
\n6<\/td>\n2
\n5<\/td>\n2
\n4<\/td>\n2
\n3<\/td>\n2
\n2<\/td>\n2
\n1<\/td>\n2
\n0<\/td>\n1
\n9<\/td>\n1
\n8<\/td>\n1
\n7<\/td>\n1
\n6<\/td>\n1
\n5<\/td>\n1
\n4<\/td>\n1
\n3<\/td>\n1
\n2<\/td>\n1
\n1<\/td>\n1
\n0<\/td>\n\n9<\/td>\n \n8<\/td>\n \n7<\/td>\n \n6<\/td>\n \n5<\/td>\n \n4<\/td>\n \n3<\/td>\n \n2<\/td>\n \n1<\/td>\n \n0<\/td>\n<\/tr>\n \n N<\/td>\n Z<\/td>\n C<\/td>\n V<\/td>\n Q<\/td>\n \u00a0<\/td>\n GE[3:0]<\/td>\n \u00a0<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n the N, Z, C, and V flags are updated by arithmetic operations. The GE flags are updated by SIMD operations. The Q flag is different: It is set when a saturating arithmetic operation overflows, and the only way to clear it is to issue an
MSR<\/code> instruction.<\/p>\nIn user mode, the unlabeled bits of the APSR read as zero, and any attempts to modify them are ignored.<\/p>\n
The odd placement of the four main numeric flags dates back to the first revision of the ARM processor.<\/p>\n
The original ARM processor supported only 26-bit addresses, for a total address space of 64MB, and all instructions had to begin on a four-byte boundary. The unused bits of the pc<\/var> register were repurposed to hold the flags<\/a>!<\/p>\n
\n\n
\n 3
\n1<\/td>\n3
\n0<\/td>\n2
\n9<\/td>\n2
\n8<\/td>\n2
\n7<\/td>\n2
\n6<\/td>\n2
\n5<\/td>\n2
\n4<\/td>\n2
\n3<\/td>\n2
\n2<\/td>\n2
\n1<\/td>\n2
\n0<\/td>\n1
\n9<\/td>\n1
\n8<\/td>\n1
\n7<\/td>\n1
\n6<\/td>\n1
\n5<\/td>\n1
\n4<\/td>\n1
\n3<\/td>\n1
\n2<\/td>\n1
\n1<\/td>\n1
\n0<\/td>\n\n9<\/td>\n \n8<\/td>\n \n7<\/td>\n \n6<\/td>\n \n5<\/td>\n \n4<\/td>\n \n3<\/td>\n \n2<\/td>\n \n1<\/td>\n \n0<\/td>\n<\/tr>\n \n N<\/td>\n Z<\/td>\n C<\/td>\n V<\/td>\n \u00a0<\/td>\n program counter<\/td>\n \u00a0<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n The unlabeled bits are used only in kernel mode: In user mode, they read as zero and writes are ignored. The
Q<\/code> andGE<\/code> flags had not been invented yet, so the only user-mode flags are N, Z, C, and V.<\/p>\nYou can think of the flag bits as stowaways hiding inside the unused bits of the program counter register. If used as the first source parameter in a binary operation, all the extraneous non-program-counter bits were masked off, allowing you to perform pc<\/var>-relative addressing and pc<\/var>-based arithmetic.\u00b9 In other contexts, however, the full 32-bit value of pc<\/var> is used, flags and all.<\/p>\n
When support expanded to a full 32-bit address space in ARM 3(?), those flag bits had to move to the APSR register, but to faciliate porting, their bit positions were preserved.<\/p>\n
There are no dedicated instructions for manipulating specific flags. If you want to, say, set the carry flag and leave all other flags unchanged, you’ll have to copy the ASPR to a general-purpose register, set the carry bit, and then set it back.<\/p>\n
If you don’t mind corrupting the other flags, then you can use some tricks to coerce a particular flag to a specific state.<\/p>\n
; compare a number with itself\r\n cmp r0, r0 ; sets N = 0, Z = 1, C = 1, V = 0\r\n<\/pre>\nComparing a number sets flags according to the result of the subtraction, which produces zero. Therefore, the flags are set for nonnegative, zero, carry set (no underflow), and no overflow.<\/p>\n
To clear carry, you can add zero:<\/p>\n
adds r0, r0, #0\r\n<\/pre>\nAdding zero will never cause unsigned overflow, so this leaves carry clear.<\/p>\n
Alternatively, if you don’t want to create a false write dependency on r0<\/var>, you could use<\/p>\n
; add 0 and set flags, but discard result\r\n cmn r0, #0\r\n<\/pre>\n